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SoC互连:不要DIY

With so many acquisitions in the interconnect IP market, you might be forgiven for thinking DIY interconnect is a good idea.随着互连IP市场的大量收购,您可能会认为DIY互连是一个好主意。

There's been a lot of action in the interconnect IP market over the past year – most notably the acquisition of NetSpeed by Intel and Sonics by Facebook. What's happening? Why are companies seeing the critical importance of interconnect IPs now? Is interconnect a key factor in system-on-chip (SoC) delivery productivity for multi-SoC project corporations? Are these acquisitions a way around the fact that interconnect development is lengthy, costly, and difficult?为什么公司现在看到互连IP的重要性?互连是否成为关键因素?过去一年互联网IP市场已经采取了很多行动 - 最明显的是英特尔和超音速通过Facebook收购NetSpeed。对于多SoC项目公司而言,这些收购是否可以解决互连开发冗长,繁琐且难以实现的片上系统(SoC)交付生产率的问题?

The recent market consolidation might have some companies considering whether this is a do-it-yourself (DIY) project that your company should consider taking on. Whether it's a simple crossbar switch or a full-function network-on-chip (NoC) architecture for advanced SoCs, all that's needed are the right people with the right knowledge and a big budget; eventually, it could happen. But the question isn't can you do it? It's should you do it?最新的市场整合可能会让一些公司考虑这是一个自己动手(DIY)项目,贵公司应该考虑采用这种方案。它是一个简单的纵横交换机或全功能的片上网络(NoC)架构最终,它可能会发生。但问题不是你可以吗?你应该这样做吗?

Licensing NoC IP from a provider that already has a history of tackling cutting-edge issues, such as functional safety for autonomous vehicles, can help accelerate time-to-market with the right features, documentation, and traceability. (Source: Arteris IP, Arm) (来源:Arteris IP,来自C C C C的Li No源数源源数据源源数据源源数据源源数源来源,Li源ARM

SoC applications have rapidly changing requirements that must be quickly addressed through the interconnect, but most homegrown interconnects were not developed to be user friendly. Given the huge fixed development costs, doing one chip a year usually makes no economic sense. Most design teams have adopted a platform approach where one design is adapted for multiple markets and use cases by quickly creating derivative chips. The interconnect is key to creating these derivative semiconductors; failure to have a world-class interconnect IP slows down the ability to adapt to new chip requirements and severely limits the market responsiveness of companies. SoC应用程序具有快速变化的要求,必须通过互连快速解决,但大多数本土互连都没有开发出用户友好性。鉴于固定开发成本巨大,一年一年做一次未能拥有世界级的互连IP会降低功耗,从而利用世界平台,通过快速创建衍生芯片,设计适用于多个市场和用例。严重限制了公司的市场反应能力。

Figure 1. SoCs for different markets and use cases can have very different NoC interconnect requirements and priorities. 100% quality is necessary no matter what type of SoC, though. (Source: Arteris ) 不管是什么类型的SoC,都需要100%的质量。(来源: Arteris )图1.不同市场和用例的SoC可能有非常不同的NoC互连要求和优先级。

Another important thing to consider is that building an interconnect is very difficult, given all of the power, latency, bandwidth, data path, and security parameters that need to be optimized. Not to mention the unique engineering expertise required to make an interconnect IP. Interconnect development is a team sport requiring a coherent combination of architecture, hardware, and software development expertise with meticulous attention to verification and quality. The bottom line is creating a configurable interconnect IP product that is scalable enough for nearly any SoC goes beyond skill; “it is an art,” and it's becoming a critical art.另一个需要考虑的重要事项是,考虑到需要优化的所有功耗,延迟,带宽,数据路径和安全参数,构建互连非常困难。并非制造互连IP所需的独特工程专家所独有。互连开发是一项团队运动,需要将架构,硬件和软件开发专业知识与对验证和质量的细致关注相结合。底线是创建可配置的互连IP产品,可通过智能扩展这是一门艺术,“它正在成为一种批判性艺术。

DIY = Danger DIY =危险
If you're still tempted to build your own interconnect IPs, let's take a moment to consider what it takes to develop NoC interconnects. NoC technology uses a packetized approach; it eliminates wires, frees up chip real estate, and reduces power demands. Designing the NoC so that it gets the packets to where they need to be, at the time they need to be there – without blowing up the area and/or power – this is the tricky part. This requires three distinctly skilled experts: The networking expert to break down packets, channels, and quality of service; the semiconductor expert for design, verification, and HDL expertise to design down to the gate level; and the software expert to ensure that the configuration tooling provides as much information and automation as is required to create an efficient and, hopefully, pleasurable experience for the chip architects and interconnect implementers who are driving the interconnect configuration. And remember, interconnect IP quality is essenti如果您仍然想要构建自己的互连IP,那么我们花点时间考虑一下开发NoC互连的过程。没有C技术使用分组化方法;这需要三个不同的技能专家:网络专家。编号C.当他们需要在那里时,它到达他们需要的数据包 - 而不会炸毁区域和/或电源。设计,验证和HDL专业知识的半导体专家,设计到门级;以及软件专家,确保配置提供尽可能多的信息和自动化请记住,互连IP质量对于为芯片架构师和互连实施者创造有效且充满希望的愉悦体验至关重要。 al because bugs in the interconnect can cause project delays or even failures. This means that effective quality processes and execution are key to interconnect IP delivery.这意味着有效的质量流程和执行是互连IP交付的关键。因为互连中的错误可能导致项目延迟甚至失败。

· 2019-06-15 20:11  本新闻来源自:eetimes,版权归原创方所有

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